In order to validate proper functioning of a memory/cache coherency model in a multiprocessor system, it is important to test conditions involving simultaneous access and update of the same cache lines, memory pages, memory segments, and other architecturally defined structures from threads executing on different processors. Generally, by the time that a system reaches the system testing stage in a product development cycle, the majority of functional errors are likely to have been identified and fixed. Testing for any remaining problems tends to require complicated interactions and concurrent activity.
Verifying data integrity under these conditions is challenging. If no control is exerted over concurrent write operations, no prediction can be made as to those data values that constitute valid data. However, too much program control may defeat the purpose of the test. That is, with too much program control of concurrency the test program is essentially validated instead of the system cache coherency.
A method and apparatus that addresses the aforementioned problems, as well as other related problems, are therefore desirable.